NetNews Offline 2/NetNews Offline Volume 2.iso/news/comp/dcom/modems-part1/4328

Internet Message Format | 1996-08-05 | 3.4 KB

Path: valinor.mythical.com!valinor!n5ial!jim
From: [e-mail] (Jim Graham)
Newsgroups: comp.dcom.modems
Subject: Re: What does UART stand for?
Message-ID: <[e-mail]>
Date: Wed, 7 Feb 1996 02:01:08 GMT
References: <4f3sfj$[e-mail]> <[e-mail]> <[e-mail]>
Organization: Okaloosa Island dep't of fishing/brewing/ham radio/computers

In article <[e-mail]>
[e-mail] (Chris Meyer) writes:
>In article <[e-mail]>,
>Charlie O'Brian <[e-mail]> wrote:
>>In article <4f3sfj$[e-mail]>, [e-mail] (Caius)
>>wrote:

>>>What does UART stand for and what do UART chips do exactly?

>>Don't mistake me for an expert, but I believe it stands for something like
>>Universal(?) Asynchronous Receive & Transmit.

Actually, that should be Universal Async. Receiver/Transmitter.

>It also allows data to flow at much faster speeds than the 8250s that
>only go at 9600 baud.

Two things....

First, the 8250 *IS* a UART.  I didn't see anyone in the above (including
the deleted text) say anything about any particular flavor of UART....

Second, be careful with generalizations about ``8250'' UARTs.  I don't
have the data sheets for the original 8250, but I do have one here
(somewhere...) that refuses to be programmed at any speed higher than
9600 bits/second.  Btw, that is bits/second, not baud.  There's a *HUGE*
difference.  E-mail me if you need the explanation---I've posted enough on
that over the years that I just really don't feel like posting it
again...at least, not right now.  :-)

Anyways, back to the 8250 line of UARTs.  The 8250A is, according to the
data sheets I got from NS, basically the same as the 16450, and can handle
considerably higher speeds than the original 8250 (at least, the one I
have---again, no data sheets on the original version here).

The 16550A[F], which you are referring to, is an entirely different
animal.  It is basically a fast 16450 with 16-byte (instead of 1-byte)
deep FIFOs and the ability to allow the interrupt service routine to
take advantage of those FIFOs in two important ways.  The first is by
activating the FIFOs and giving the CPU some breathing room (i.e., it
has longer to service the interrupt before the FIFO is overrun).

The second is by allowing the 16550A[F] to be configured to not send an
interrupt for each and every character (unless a timer, 4 character times
to be exact, expires before the next one arrives).  The ISR is then
capable of retrieving all characters in the FIFO while servicing a single
interrupt.  This reduces CPU overhead from changing context to service
serial port interrupts, and is generally more efficient.

Now, whether any of that really matters all depends on how busy your
system is relative to its power and the incoming data rate.  Of course,
if your system (kernel or app. software, which ever is appropriate to
your operating system/program loader, respectively) doesn't enable the
FIFOs, the 16550A[F] (or the original 16550, period) is just a fast
16450.

Later,
   --jim

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